Intel Xeon Phi Architecture

Lecturer

    • 이홍석 박사 (KISTI)

Course Outline

Morning LectureAfternoon Hands-on
Single Core
- Clock
- Memory
- Cache (L1, L2)
- In-order execution
- SIMD
- Bandwidth
Manycores
- Number of threads
- Hardware threads vs Hyper-threads
- Prefetch
- Bandwidth
- Multi-cores Limits
Heterocores
- PICe
- Programming model (Native, Offload)		Bandwidth and Saxpy
Roofline model
LJ potential Algorithm